Sr. FPGA Digital Design Engineer at The Judge Group Inc.

Posted in Other 11 days ago.

Location: Lafayette, Colorado





Job Description:

Location: Lafayette, CO

Description:
Senior FPGA Digital Design Engineer


Location: Lafayette, CO


Role Overview: As a Senior FPGA Digital Design Engineer, you will play a crucial role in the development of complex Field Programmable Gate Array (FPGA) designs for space applications. Your primary focus will be on FPGA design tasks, with the possibility of involvement in FPGA verification activities based on your interest and experience.


Key Responsibilities:


  • Collaborate with the FPGA team to design and enhance established FPGA designs.

  • Develop new FPGA designs for space applications.

  • Utilize Verilog and simulation tools for FPGA design.

  • Work closely with electrical engineering basics, including board-level design and circuits.

  • Participate in command and data handling tasks related to FPGA systems.

  • Contribute to technical discussions and presentations with customers and team members.

  • Mentor junior engineers and share expertise within the team.

Required Qualifications:


  • Bachelor's degree or higher in Electrical Engineering.

  • 7+ years of detailed electronics design experience, with at least 5 years specifically in FPGA design (verification experience is a plus).

  • Familiarity with clock domain crossing (CDC) tools and FPGA design best practices.

  • Experience with AXI-based design, DMA, and scripting tools.

  • Strong written communication and presentation skills.

  • Ability to work effectively in a small, enthusiastic technical team.

Desired Skills:


  • Independent generation of FPGA designs based on detailed requirements using VHDL.

  • Verification of high-speed serial interfaces (e.g., 10 Mb/100Mb/1Gb Ethernet, SpaceWire, LVDS) using simulation methods (UVM, OVM, functional test benches).

  • Creation of state diagrams, timing diagrams, and other design documentation.

  • Robust Finite State Machine (FSM) and interface logic design.

  • Generation of FPGA test vectors and simulation test benches (ModelSim, QuestaSim).

  • Synthesis of FPGA designs using tools like ISE, Libero, Libero SoC, and Vivado.

  • Proficiency in chip-level and board-level debugging with various test equipment.

Additional Information:


  • This position is contract-to-hire, with the goal of retaining talented individuals.

  • Onsite work is required (potential flexibility for 3 days onsite).

  • Security clearance is not necessary.

  • Interviews typically involve a 2.5-hour session, including a presentation on a past design project.



Contact: dwalsh@judge.com


This job and many more are available through The Judge Group. Find us on the web at www.judge.com
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