NXP Semiconductors N.V. (NASDAQ: NXPI) enables secure connections for a smarter world, advancing solutions that make lives easier, better, and safer. As the world leader in secure connectivity solutions for embedded applications, NXP is driving innovation in the automotive, industrial & IoT, mobile, and communication infrastructure markets. Built on more than 60 years of combined experience and expertise, the company has approximately 29,000 employees in more than 30 countries and posted revenue of $8.61 billion in 2020.

Product Development (DFT) Engineer

Business Unit Description

NXP’s MCU/MPU Engineering business unit offers sensor and AUTO/EDGE processing technology that drives all aspects of the secure connected cars of today and the autonomous cars of tomorrow.

Job Summary

The Product Development (DFT) Engineer role will involve many aspects of Test and DFT in the R&D NPI Design Quality group. Our team works together to ensure our new leading edge chips meet the Quality standards required for future Autonomous EVs and MCUs and MPUs for our Edge Processing business. We also support our existing Automotive products and work closely with cross functional teams across NXP to solve customer issues and build the Zero Defect mindset.

The existing team is a mix of design, product and test, and quality engineers who are experts in their respective functional areas, coming together to solve complex design and to support our customers.

This is a great opportunity for someone who is innovative, persistent and curious as we are designing with a Zero Defect mindset for our Automotive customers.  You’ll interface with multiple functional areas within R&D as well as the Business, Operations, FA, and Quality teams which will give the right person a real ability to grow their skills and a develop an in depth understanding of the semiconductor industry from R&D to our end Customers.   As a Product Development (DFT) engineer in the team, you will work closely with R&D DFT team, test and quality teams to identify innovation DFT techniques needed to achieve and maintain PPB Quality Levels.

Job Qualifications

• 5+ years in Test and/or Product engineering




• 5+ years in DFT Methodology/Implementation mainly in SCAN ATPG




• 5+ years total Industry (SoC) Experience




• Scan ATPG pattern generation




• Low-coverage ATPG debug experience is a plus




• At-speed Scan Diagnostics for Failure Analysis




• Transition & Path delay testing




• Memory BIST Algorithm development and implementation




• JTAG Boundary Scan Design & implementation




• IC Parametric test methods and implementation




• Low pin-count test methods




• Experience with industry standard DFT tools such as Synopsys or Mentor




• Experience working closely with post-silicon teams (test engineering and failure analysis) is a plus




• Excellent written and verbal communication skills in English




• Ability to travel domestically and internationally as needed (~15%)




• Proven track record in SoC DFT methodology development




• Direct experience in DFT methods and implementation required




• Excellent debug skills required




• Ability to work with sites from multiple geographical locations is required

Education

BSEE / MSEE plus 5+ years’ experience in Semiconductor industry. 

Job Location

Austin, TX

NXP is an Equal Opportunity/Affirmative Action Employer regardless of age, color, national origin, race, religion, creed, gender, sex, sexual orientation, gender identity and/or expression, marital status, status as a disabled veteran and/or veteran of the Vietnam Era or any other characteristic protected by federal, state or local law. In addition, NXP will provide reasonable accommodations for otherwise qualified disabled individuals.