UST Global is looking for a Technical Lead II - VLSI to build end to end business solutions and to work with one of the leading semiconductor developer in US. The ideal candidate must possess excellent background on Verification technologies. The candidate must possess excellent written and verbal communication skills with the ability and collaborate effectively with domain and technical experts in the team.

Description:

* Responsible for writing tests in UVM to verify various NVMe protocol features in enterprise SSD controller at module and subsystem level.

* Independently develop and debug UVM test cases utilizing his/her deep knowledge on NVMe and AXI protocols

* At least have worked on NVMe protocol and UVM for 2 years in last 4 year time frame.

Skill Set: (Must)

* System Verilog

* UVM

Domain Knowledge: (Must)

* NVMe Protocol

* AXI4 Protocol

Overall Experience:

* 7+ years

* BS or MS in EE, ECE or CE

Location: Milpitas, USA

UST Global celebrates diversity and inclusion. We are an Equal Employment Opportunity employer. We welcome candidates to apply for employment from diverse backgrounds and believe your unique perspective adds to the richness of our company culture. We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender identity, gender expression, age, status as a protected veteran, status as an individual with a disability, or other applicable legally protected characteristics.